1. Field of the Invention
The present invention relates to a BiCMOS logic circuit, and more specifically to a BiCMOS logic circuit having a high operation speed.
2. Description of Related Art
In general, BiCMOS logic circuits have been composed of an input MOS logic circuit and an output bipolar circuit. Conventionally, when electric charges on an output of the bipolar circuit is discharged to pull down an output voltage of the bipolar circuit, a base current for a bipolar transistor for extracting the electric charge on the output of the bipolar circuit is supplied by only a MOS transistor whose gate is connected to a logic input of the input MOS logic circuit and whose drain-source path is connected between a collector and the base of the charge extracting bipolar transistor. In this arrangement, if the collector-base voltage of the charge extracting bipolar transistor becomes lowered as a result of the discharge of the electric charge on the output of the bipolar circuit, the drain-source voltage of the base current supplying MOS transistor is correspondingly decreased, so that the MOS transistor will become to operate in a linear region. As a result, a sufficient base current is not supplied to the charge extracting bipolar transistor, so that the voltage falling down speed of the output of the bipolar circuit becomes small. Thus, the BiCMOS logic circuit has a large delay time, and a long signal propagation time.